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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
Copyright (c) 1998, Power Innovations Limited, UK NOVEMBER 1995 - REVISED FEBRUARY 1998
PROGRAMMABLE SLIC OVERVOLTAGE PROTECTION FOR LSSGR `1089
q
Dual Voltage-Programmable Protectors - Wide 0 to -85 V Programming Range - Low 5 mA max. Gate Triggering Current - High 150 mA min. Holding Current Rated for LSSGR `1089 Conditions
WAVE SHAPE 2/10 s 10/1000 s 60 Hz POWER FAULT TIME 100 ms 1s 5s 300 s 900 s `1089 TEST CLAUSE AND TEST # 4.5.8 Second-Level 1 4.5.7 First-Level 3 `1089 TEST CLAUSE AND TEST # 4.5.13 Second-Level 2 4.5.13 Second-Level 2 4.5.13 Second-Level 2 4.5.13 Second-Level 1 4.5.13 Second-Level 1 ITSP A 120 30 ITSM A 11 4.5 2.4 0.95 0.93
D PACKAGE (TOP VIEW)
(Tip)
K1 NC
1 2 3 4
8 7 6 5
K1 (Tip) A A (Ground) (Ground)
MD6XAN
(Gate) G (Ring) K2
q
K2 (Ring)
NC - No internal connection Terminal typical application names shown in parenthesis P PACKAGE (TOP VIEW)
(Tip)
K1
1 2 3 4
8 7 6 5
K1 (Tip) A A (Ground) (Ground)
(Gate) G NC (Ring) K2
K2 (Ring)
MD6XAV
q
2/10 Protection Voltage Specified
ELEMENT Diode Crowbar VGG = -48 V FIRST-LEVEL V @ 56 A 6 -57 SECOND-LEVEL V @ 100 A 8 -60
NC - No internal connection Terminal typical application names shown in parenthesis
device symbol
K1 G K2
q q
Also Rated for ITU-T 10/700 impulses Surface Mount and Through-Hole Options - TISP61089P for Plastic DIP - TISP61089D for Small-Outline - TISP61089DR for Small-Outline Taped and Reeled
A
SD6XAE
description
The TISP61089 is a dual forward-conducting Terminals K1, K2 and A correspond to the alternative buffered p-gate overvoltage protector. It is line designators of T, R and G or A, B and C. The negative protection voltage is controlled by the voltage, designed to protect monolithic SLICs (Subscriber VGG, applied to the G terminal. Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISP61089 limits voltages that exceed the SLIC supply rail voltage. The TISP61089 parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE, Issue 1. The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -10 V to -75 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will then track the negative supply voltage the overvoltage stress on the SLIC is minimised. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then
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INFORMATION
Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters.
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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
the protector will crowbar into a low voltage on-state condition. As the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup. The TISP61089 is intended to be used with a series combination of a 25 or higher resistance and a suitable overcurrent protector. Power fault compliance requires the series overcurrent element to open-circuit or become high impedance (see Applications Information). For equipment compliant to ITU-T recommendations K20 or K21 only, the series resistor value is set by the power cross requirements. For K20 and K21, a minimum series resistor value of 10 is recommended. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISP61089 buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The TISP61089 is available in 8-pin plastic small-outline surface mount package and 8-pin plastic dual-in-line package.
absolute maximum ratings
RATING Repetitive peak off-state voltage, IG = 0, -40C TJ 85C Repetitive peak gate-cathode voltage, VKA = 0, -40C TJ 85C Non-repetitive peak on-state pulse current (see Notes 1 and 2) 10/1000 s (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4) 5/320 s (ITU-T recommendation K20 & K21, open-circuit voltage wave shape 10/700) 1.2/50 s (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4, Alternative) 2/10 s (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4) Non-repetitive peak on-state current, 60 Hz (see Notes 1 and 2) 0.1 s 1s 5s 300 s 900 s Non-repetitive peak gate current, 1/2 s pulse, cathodes commoned (see Notes 1 and 2) Operating free-air temperature range Junction temperature Storage temperature range IGSM TA TJ Tstg ITSM 11 4.5 2.4 0.95 0.93 40 -40 to +85 -40 to +150 -40 to +150 A C C C A ITSP 30 40 100 120 A SYMBOL VDRM VGKRM VALUE -100 -85 UNIT V V
NOTES: 1. Initially the protector must be in thermal equilibrium with -40C TJ 85C. The surge may be repeated after the device returns to its initial conditions. 2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Above 85C, derate linearly to zero at 150C lead temperature.
recommended operating conditions
MIN CG RS Gate decoupling capacitor TISP61089 series resistor for first-level and second-level surge survival TISP61089 series resistor for first-level surge survival 100 40 25 TYP 220 MAX UNIT nF
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INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
electrical characteristics, TJ = 25C (unless otherwise noted)
PARAMETER ID Off-state current VD = -85 V, VGK = 0 TEST CONDITIONS TJ = 25C TJ = 85C -57 -60 -60 -64 3 6 8 8 12 -150 TJ = 25C TJ = 85C -5 -50 5 2.5 0.1 100 50 mA A A mA V C pF pF V V V MIN TYP MAX -5 -50 UNIT A A
2/10 s, IT = -56 A, RS = 45 , VGG = -48 V, CG = 220 nF V(BO) Breakover voltage 2/10 s, IT = -100 A, RS = 50 , VGG = -48 V, CG = 220 nF 1.2/50 s, IT = -53 A, RS = 47 , VGG = -48 V, CG = 220 nF 1.2/50 s, IT = -96 A, RS = 52 , VGG = -48 V, CG = 220 nF VF Forward voltage Peak forward recovery voltage Holding current Gate reverse current Gate trigger current Gate trigger voltage Gate switching charge Anode-cathode offstate capacitance IF = 5 A, tw = 200 s 2/10 s, IF = 56 A, RS = 45 , VGG = -48 V, CG = 220 nF VFRM 2/10 s, IF = 100 A, RS = 50 , VGG = -48 V, CG = 220 nF 1.2/50 s, IF = 53 A, RS = 47 , VGG = -48 V, CG = 220 nF 1.2/50 s, IF = 96 A, RS = 52 , VGG = -48 V, CG = 220 nF IH IGAS IGT VGT QGS CAK IT = -1 A, di/dt = 1A/ms, VGG = -48 V VGG = VGK = -75 V, VKA = 0 IT = 3 A, tp(g) 20 s, VGG = -48 V IT = 3 A, tp(g) 20 s, VGG = -48 V 1.2/50 s, IT = 53 A, RS = 47 , VGG = -48 V CG = 220 nF f = 1 MHz, Vd = 1 V, IG = 0, (see Note 3) VD = -3 V VD = -48 V
NOTE
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge.
thermal characteristics
PARAMETER RJA Junction to free air thermal resistance TEST CONDITIONS Ptot = 0.8 W, TA = 25C 5 cm2, FR4 PCB D Package P Package MIN TYP MAX 160 100 UNIT C/W
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INFORMATION
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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
PARAMETER MEASUREMENT INFORMATION
+i IFSP (= |ITSP|) Quadrant I Forward Conduction Characteristic
IFSM (= |ITSM|) IF VF VGK(BO) VGG VD ID
-v
+v
I(BO) IS
IH VT IT ITSM
V(BO)
VS
Quadrant III Switching Characteristic ITSP -i
PM6XAAA
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC
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INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
THERMAL INFORMATION
PEAK NON-RECURRING A.C. vs CURRENT DURATION
ITSM - Peak Non-Recurrent 60 Hz Current - A
TI6LACA
10
RING AND TIP CONNECTIONS ITSM applied simultaneously to both GROUND CONNECTION Return current is twice ITSM VGEN = 600 Vrms RGEN = 70 to 950 VG = -48 V, TAMB = 85C
1 0*1 1 10 100 1000
t - Current Duration - s
Figure 2. NON-REPETITIVE PEAK ON-STATE CURRENT AGAINST DURATION
APPLICATIONS INFORMATION gated protectors
This section covers three topics. Firstly, it is explained why gated protectors are needed. Second, the voltage limiting action of the protector is described. Third, an example application circuit is described. purpose of gated protectors Fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. As the SLIC was usually powered from a fixed voltage negative supply rail, the limiting voltage of the protector could also be a fixed value. The TISP1072F3 is a typical example of a fixed voltage SLIC protector. SLICs have become more sophisticated. To minimise power consumption, some designs automatically adjust the supply voltage, VBAT, to a value that is just sufficient to drive the required line current. For short lines the supply voltage would be set low, but for long lines, a higher supply voltage would be generated to drive sufficient line current. The optimum protection for this type of SLIC would be given by a protection voltage which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyristor gate to the SLIC supply, Figure 3. This gated (programmable) protection arrangement minimises the voltage stress on the SLIC, no matter what value of supply voltage.
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INFORMATION
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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
TIP WIRE 600 GENERATOR SOURCE RESISTANCE 600 RING WIRE A.C. GENERATOR 0 - 600 Vrms R1b >25 R1a >25
TISP61089 Th4
SLIC
Th5
SWITCHING MODE POWER SUPPLY Tx
IG C1 220 nF
ISLIC IBAT VBAT
C2 D1 AI6XAG
Figure 3. TISP61089 BUFFERED GATE PROTECTOR (SECTION 4.5.12 TESTING CONDITION) operation of gated protectors Figures 4. and 5. show how the TISP61089 limits negative and positive overvoltages. Positive overvoltages (Figure 5) are clipped by the antiparallel diodes in the TISP61089 and the resulting current is diverted to ground. Negative overvoltages (Figure 4.) are initially clipped close to the SLIC negative supply rail value (VBAT). If sufficient current is available from the overvoltage, then the protector (Th5) will crowbar into a low voltage on-state condition. As the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup. The protection voltage will be the sum of the gate supply (VBAT) and the peak gate-cathode voltage (VGK(BO)). The protection voltage will be increased if there is a long connection between the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast impulse, the gate current (IG) is the same as the cathode current (IK). Rates of 70 A/s can cause inductive voltages of 0.7 V in 2.5 cm of printed wiring track. To minimise this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimised. Inductive voltages in the protector cathode wiring will also increase the protection voltage. These voltages can be minimised by routing the SLIC connection through the protector as shown in Figure 3.
PROTECTOR CROWBAR OPERATION PROTECTOR DIODE OPERATION
SLIC
SLIC
IK
Th5 TISP 61089 C1 220 nF IG VBAT AI6XAH
IF
Th5 TISP 61089 C1 220 nF VBAT AI6XAI
Figure 4. NEGATIVE OVERVOLTAGE CONDITION
Figure 5. POSITIVE OVERVOLTAGE CONDITION
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INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
In Figure 6, the positive gate charge (QGS) is about 0.1 C which, with the 0.1 F gate decoupling capacitor used, increased the gate supply by about 1 V (= QGS/C1). This change is just visible on the -72 V gate voltage, VBAT. This increase does not directly add to the protection voltage as the supply voltage change reaches a maximum at 0.4 s when the gate current reverses polarity; whereas the protection voltage peaks at 0.3 s. In Figure 6, the peak clamping voltage (V(BO)) is -77.5 V, an increase of 5.5 V on the nominal gate supply voltage. This 5.5 V increase is the sum of the supply rail increase at that time, (0.5 V), and the protection circuits cathode diode to supply rail breakover voltage (5 V). In practice, use of the recommended 220 nF gate decoupling capacitor would give a supply rail increase of 0.25 V and a V(BO) value of about -77.25 V.
0
-20 Voltage - V VK VBAT
-40
-60
-80 0.0 0.5 Time - s 1 0 Current - A -1 -2 -3 -4 -5 0.0 0.5 Time - s 1.0 1.5 IK QGS 1.0 1.5
IG
Figure 6. PROTECTOR FAST IMPULSE CLAMPING AND SWITCHING WAVEFORMS
application circuit
Figure 7 shows a typical TISP61089 SLIC card protection circuit. The incoming line conductors, Ring (R) and Tip (T), connect to the relay matrix via the series overcurrent protection. Fusible resistors, fuses and positive temperature coefficient (PTC) resistors can be used for overcurrent protection. Resistors will reduce the prospective current from the surge generator for both the TISP61089 and the ring/test protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator configuration may be ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as its inter-conductor protection voltage is twice the conductor to ground value.
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INFORMATION
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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998 OVERCURRENT PROTECTION TIP WIRE R1a
RING/TEST PROTECTION Th1
TEST RELAY
RING RELAY
SLIC RELAY S3a
SLIC PROTECTOR Th4
SLIC
S1a Th3
S2a
RING WIRE
R1b
Th2 TISP 3xxxF3 OR 7xxxF3 S3b S1b S2b
Th5 TISP 61089 C1 220 nF VBAT
TEST EQUIPMENT
RING GENERATOR
AI6XAJ
Figure 7. TYPICAL APPLICATION CIRCUIT Relay contacts 3a and 3b connect the line conductors to the SLIC via the TISP61089 protector. The protector gate reference voltage comes from the SLIC negative supply (VBAT). A 220 nF gate capacitor sources the high gate current pulses caused by fast rising impulses.
LSSGR 1089
GR-1089-CORE, "1089", covers electromagnetic compatibility and electrical safety generic criteria for US network telecommunication equipment. It is a module in Volume 3 of LSSGR (LATA (Local Access Transport Area) Switching Systems Generic Requirements, FR-NWT-000064). In 1089 surge and power fault immunity tests are done at two levels. After first-level testing the equipment shall not be damaged and shall continue to operate correctly. Under second level testing the equipment shall not become a safety hazard. The equipment is permitted to fail as a result of second-level testing. When the equipment is to be located on customer premises, second-level testing includes a wiring simulator test, which requires the equipment to reduce the power fault current below certain values. The following clauses reference the 1089 section and calculate the protector stress levels. The TISP61089 is specified for use with a 40 series resistor. This resistor value will ensure that the TISP61089 survives second level surge testing. Values down to 25 may be used if some second level surge failure is acceptable. All the tabulated values are for a series resistance of 40 . Peak current values for a 25 series resistor are covered in the clause text. The values of protector current are calculated from the open circuit generator voltage divided by the sum of the total circuit resistance. The total circuit resistance is the sum of the generator fictive source resistance and the TISP61089 series resistor value. Most generators have multiple outputs and each output connects to an individual line conductor. For those generators that have a single output, each conductor will have an effective generator fictive source resistance of n times the generator fictive source resistance, where n is the number of conductors simultaneously tested.
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INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
section 4.5.7 - first-level surge testing The two most significant test wave shapes in this section are the high energy 10/1000 and the high current 2/10. As shown in table 1, the peak currents for these surges are 2x20 A and 2x56 A respectively. The protector must survive the 2x20 A 10/1000 surge and the TISP61089 will do this as its rating is 2x30 A. When both conductors are surged simultaneously the return (anode) current will be 40 A, again the TISP61089 will survive this as its rating for this condition will be 60 A. Similarly the TISP61089 will survive the 2x56 A 2/10 as its rating is 2x120 A.
table 1. first-level surge currents
OPEN-CIRCUIT VOLTAGE V 2500 2500 1000 600 1000 SHORT-CIRCUIT CURRENT A 500 360 100 100 100 GENERATOR FICTIVE SOURCE RESISTANCE 5 4+3 10 6 10 TOTAL CIRCUIT RESISTANCE 45 47 50 46 50 IT A 2x56 2x53 2x20 2x13 2x20
WAVE SHAPE
2/10 1.2/50, 8/20 (See Text) 10/360 10/1000 10/1000
The highest protection voltage will be for the 56 A 2/10 wave shape. Under this condition the average rate of current rise will be 56/2 = 28 A/s. The value of diode and thyristor voltage under this condition is specified in the electrical characteristics. Compared to TR-NWT-001089, Issue 1, October 1991, GR-1089-CORE, Issue 1, November 1994, adds the alternative of using the IEEE C62.41 1.2/50-8/20 combination wave generator for the 2/10 test. This generator usually has a single output and a fictive resistance of 2 . The 2/10 generator has a fictive output resistance 5 , (2500/500), and GR-1089-CORE compensates for this by adding an extra 3 in the output of the 1.2/508/20 generator. In practice, the extra 3 causes the prospective short-circuit current wave shape to be similar to the 1.2/50 open-circuit voltage wave shape. The TISP61089 will survive the 2x53 A 1.2/50 as its rating is 2x100 A. Using a 25 series resistor will result in table 1. IT column values of 2x83, 2x78, 2x29, 2x19 and 2x29. The TISP61089 will survive these peak current values as they are lower than the TISP61089 ratings. section 4.5.8 - second-level surge testing This is a 2/10 wave shape test. As shown in table 2, the peak current for this surge is 2x100 A. The TISP61089 will survive the 2x100 A 2/10 surge as its rating is 2x120 A. Under this condition the average rate of current rise will be 100/2 = 50 A/s. The value of diode and thyristor voltage under this condition is specified in the electrical characteristics. Compared to TR-NWT-001089, Issue 1, October 1991, GR-1089-CORE, Issue 1, November 1994, adds the alternative of using the IEEE C62.41 1.2/50-8/20 combination wave generator for the 2/10 test. The 2/10 generator has a fictive output resistance 10 , (5000/500), and GR-1089-CORE compensates for this by adding an extra 8 in the output of the 1.2/50-8/20 generator. In practice, the extra 8 causes the
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INFORMATION
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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
table 2. second-level surge current
OPEN-CIRCUIT VOLTAGE V 5000 5000 SHORT-CIRCUIT CURRENT A 500 420 GENERATOR FICTIVE SOURCE RESISTANCE 10 4 + 8/conductor TOTAL CIRCUIT RESISTANCE 50 52 IT A 2x100 2x96
WAVE SHAPE
2/10 1.2/50, 8/20 (See Text)
prospective short-circuit current wave shape to be similar to the 1.2/50 open-circuit voltage wave shape. The TISP61089 will survive the 2x96 A 1.2/50 as its rating is 2x100 A. Using a 25 series resistor will result in table 2. I T column values of 2x143 and 2x135. The TISP61089 may fail at these peak current values as they are higher than the TISP61089 ratings. section 4.5.9 - Intra-building surge testing These tests use a 2/10 wave shape. As shown in table 3, the peak currents for this test are 2x27 A and 17 A. The TISP61089 can survive both these levels as its rating is 2x120 A.
table 3. intra-building surge currents
OPEN-CIRCUIT VOLTAGE V 1500 800 1.2/50, 8/20 (See Text) 1500 800 SHORT-CIRCUIT CURRENT A 100 100 94 100 GENERATOR FICTIVE SOURCE RESISTANCE 15 8 4 + 12/conductor 2+6 TOTAL CIRCUIT RESISTANCE 55 48 56 48 IT A 2x27 17 2x27 17
WAVE SHAPE
2/10
Compared to TR-NWT-001089, Issue 1, October 1991, GR-1089-CORE, Issue 1, November 1994, the 2/10 alternative of using a CCITT Recommendation K.22 1.2/50-8/20 combination wave generator has been changed to an IEEE C62.41 1.2/50-8/20 generator. This generator usually has a single output and a fictive resistance of 2 . The 2/10 generator has fictive output resistances of 15 and 8 . GR-1089-CORE compensates for this by adding an extra resistances of 12 and 6 in the output of the 1.2/50-8/20 generator. In practice, this extra resistance causes the prospective short-circuit current wave shape to be similar to the 1.2/50 open-circuit voltage wave shape. The TISP61089 will survive the 2x27 A 1.2/50 as its rating is 2x100 A. Using a 25 series resistor will result in table 3. IT column values of 2x38, 24, 2x37 and 24. The TISP61089 will survive these peak current values as they are lower than the TISP61089 ratings.
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INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
section 4.5.12 - first-level power fault testing The most significant tests are a long duration (900 s) medium current test and a higher current tests of 60 one second power applications. As shown in table 4, the peak currents for these tests are 2x0.37 A and 2x1.3 A respectively. The TISP61089 will survive both these conditions as its ratings are 2x0.93 A and 2x4.5 A for these time periods
table 4. first-level power fault currents
A.C. DURATION s 1 1 1 1 900 900 OPEN-CIRCUIT RMS VOLTAGE V 200 400 600 1000 50 100 SHORT-CIRCUIT RMS CURRENT A 0.33 0.67 1 1 0.33 0.17 SOURCE RESISTANCE 600 600 600 1000 150 590 TOTAL CIRCUIT RESISTANCE 640 640 640 1040 190 630 ITRMS A 2x0.31 2x0.63 2x0.94 2x0.96 2x0.26 2x0.16 ITM A 2x0.44 2x0.88 2x1.3 2x1.3 2x0.37 2x0.22
Using a 25 series resistor will result in table 4. ITM column values of 2x0.45, 2x0.9, 2x1.4, 2x1.4, 2x0.4 and 2x0.23. The TISP61089 will survive these peak current values as they are lower than the TISP61089 ratings. section 4.5.13 - second-level power fault testing The two most significant tests are a long duration (900 s) medium current test and a higher current 5 s test. As shown in table 5, the peak currents for these tests are 2x17 A and 2x7.7 A respectively. For the TISP61089 to survive this test, the series current limiting element must operate within 0.1 s and 0.5 s respectively.
table 5. second-level power fault currents
A.C. DURATION s 5 5 900 900 900 900 900 OPEN-CIRCUIT RMS VOLTAGE V 600 600 120 277 100 300 600 SHORT-CIRCUIT CURRENT A 60 7 25 25 0.37 1.1 2.2 SOURCE RESISTANCE 10 86 5 11 273 273 273 TOTAL CIRCUIT RESISTANCE 50 126 45 51 313 313 313 ITRMS A 2x12 2x4.8 2x2.7 2x5.4 2x0.32 2x0.96 2x1.9 ITM A 2x17 2x6.8 2x3.8 2x7.7 2x0.45 2x1.4 2x2.7
Using a 25 series resistor will result in table 5. ITM column values of 2x24, 2x7.7, 2x5.7, 2x11, 2x0.47, 2x1.4 and 2x2.9. The TISP61089 will probably fail for a peak current level of 2x24 A and the series current limiting
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INFORMATION
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TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
element must operate in under 0.1 s to prevent exceeding the TISP61089 package limit. For 2x7.7 A, the series current limiting element must operate within 0.4 s for TISP61089 survival. section 4.5.15 - second-level power fault testing with wiring simulator The purpose of this test is to ensure that the telephone cable does not become a hazard due to excessive current. A series fuse, type MDQ 1-6/10A, simulates the safe current levels of a telephone cable. If this fuse opens the equipment fails the test. For the equipment to pass, the equipment series overcurrent element must reduce the current to below the MDQ 1-6/10A fusing level to prevent the simulator operating. The a.c. test voltage can range from zero to 600 V, which gives a maximum conductor current of 10 A. Table 6 shows the simulator fusing times for three current levels.
table 6. second-level power fault currents with MDQ 1-6/10A fuse
A.C. DURATION s 1000 1000 1000 OPEN-CIRCUIT RMS VOLTAGE V 100 300 600 SHORTCIRCUIT CURRENT A 5 15 30 SOURCE RESISTANCE 20 20 20 TOTAL CIRCUIT RESISTANCE 60 60 60 ITRMS A 1.7 5.0 10 ITM A 2.4 7.1 14 TIME TO OPEN s 30 0.7
Using a 25 series resistor will result in table 6. ITM column values of 2x3.1, 2x9.4 and 2x19. Simulator operating times will be , 12 s and 0.4 s respectively For the equipment to pass this test, the TISP61089 series current limiting element must operate before the MDQ 1-6/10A fusing times shown in table 7.
table 7. operating times of MDQ 1-6/10A fuse
TIME TO OPERATE s 0.2 0.5 1 5 10 1000 IRMS A 17 12 9 7 6.8 2.5
overcurrent protection
To meet `1089, the overcurrent protection must be coordinated with the requirements of sections 4.5.7, 4.5.8, 4.5.9, 4.5.12, 4.5.13, 4.5.15 and the TISP61089. The overcurrent protection must not fail in the first level tests of sections 4.5.7, 4.5.9 and 4.5.12. Recoverable overcurrent protectors (e.g. Positive Temperature Coefficient Resistors) may operate during first level testing, but normal equipment working must be restored after the test has ended. The test current levels and their duration are shown in Figure 8. First level tests have a high source resistance and the current levels are not strongly dependent on the TISP61089 series resistor value.
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INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
Second level tests have a low source resistance and the current levels are dependent on the TISP61089 series resistor value. The two stepped lines at the top of Figure 8 are for the 25 and 40 series resistor cases. If the full current-time durations occur the equipment will fail the wiring simulator test. The MDQ 1-6/ 10A fusing characteristic is also shown in Figure 8. The TISP61089 series overcurrent protection must operate before the MDQ 1-6/10A fuses, so this represents another boundary condition in the selection of the overcurrent protector. MAXIMUM RMS CURRENT vs TIME
30 20 10 7 5 3 2 1 0.7 0.5 0.3 0.2 0.1 0.01 0.1 1 Time - s 10 100 1000 First Level Tests - 25 & 40 MDQ 1-6/10A Fuse Second Level Tests - 25 Second Level Tests - 40
AI6XAK
Figure 8. `1089 MAXIMUM TEST CURRENT LEVEL Figure 9 summarises these boundary conditions. The highest current levels that can flow are influenced by the TISP61089 series resistance. After one second the maximum current-time boundary becomes set by the MDQ 1-6/10A fusing characteristic. Fusible overcurrent protectors cannot operate at first level current levels. Figure 9 shows two other curves. The lower one is the TISP61089 rated current. The overcurrent protector should not allow current-time durations greater than this otherwise the TISP61089 may fail. If second level failure is acceptable then the overcurrent protector must operate before the TISP61089 package limit is reached. The TISP61089 a.c. ratings are worse case values when the device is mounted on the minimal sized PCB used for measuring thermal resistance. Typical PCBs would give a 25% increase in the rated currents for periods above 0.1 s.
PRODUCT
Maximum RMS Current - A
INFORMATION
13
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
OVERCURRENT PROTECTOR OPERATION LIMITS vs TIME
30 20 10 7 5 3 2 1 0.7 0.5 0.3 0.2 0.1 0.01 0.1 1 Time - s 10 100 Second Level Tests - 40 Second Level Tests - 25
AI6XAL
Maximum RMS Current - A
MDQ 1-6/10A Fuse
TISP61089 Package Limit
TISP61089 Survival First Level Tests - 25 & 40
1000
Figure 9. OVERCURRENT PROTECTOR REQUIREMENTS
PRODUCT
14
INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
MECHANICAL DATA D008 plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
D008 5,00 (0.197) 4,80 (0.189) 8 7 6 5 Designation per JEDEC Std 30: PDSO-G8
6,20 (0.244) 5,80 (0.228)
4,00 (0.157) 3,81 (0.150)
1
2
3
4
1,75 (0.069) 1,35 (0.053)
7 NOM 3 Places
0,50 (0.020) x 45NOM 0,25 (0.010)
5,21 (0.205) 4,60 (0.181)
0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) Pin Spacing 1,27 (0.050) (see Note A) 6 Places
0,51 (0.020) 0,36 (0.014) 8 Places 0,229 (0.0090) 0,190 (0.0075)
7 NOM 4 Places
4 4
1,12 (0.044) 0,51 (0.020)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
MDXXAA
NOTES: A. B. C. D.
Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within 0,051 (0.002).
PRODUCT
INFORMATION
15
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
MECHANICAL DATA P008 plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centres. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly.
P008 10,2 (0.400) MAX 8 7 6 5 Designation per JEDEC Std 30: PDIP-T8
Index Dot C L 7,87 (0.310) 7,37 (0.290) T.P. 6,60 (0.260) 6,10 (0.240) C L
1
2
3
4
1,78 (0.070) MAX 4 Places
5,08 (0.200) MAX Seating Plane 0,51 (0.020) MIN 105 90 8 Places
3,17 (0.125) MIN 2,54 (0.100) T.P. 6 Places (see Note A) 0,533 (0.021) 0,381 (0.015) 8 Places
0,36 (0.014) 0,20 (0.008) 8 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position
MDXXABA
PRODUCT
16
INFORMATION
TISP61089 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
NOVEMBER 1995 - REVISED FEBRUARY 1998
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright (c) 1998, Power Innovations Limited
PRODUCT
INFORMATION
17

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